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Data processing device having selective data cache architecture and computer system including the same

Kim, Yun-Hwan ; Lee, Joong-Eon ; Lim, Kyoung-Mook 2007

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  • Title:
    Data processing device having selective data cache architecture and computer system including the same
  • Author: Kim, Yun-Hwan ; Lee, Joong-Eon ; Lim, Kyoung-Mook
  • Description: The disclosure is a data processing device with selective data cache architecture and a computer system including the data processing device. The data processing device is comprised of a microprocessor, a coprocessor, a microprocessor data cache, an X-data cache, and a Y-data cache. The microprocessor fetches and executes instructions, and the coprocessor carries out digital signal processing functions. The microprocessor data cache stores data provided from the microprocessor. The X-data cache stores a first group of data provided from the coprocessor while the Y-data cache stores a second group of data provided from the coprocessor.
  • Creation Date: 2007
  • Language: English
  • Source: USPTO Issued Patents

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