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21
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Impedance characteristics of power distribution grids in nanoscale integrated circuits

Mezhiba, A ; Friedman, E Mezhiba, A (correspondence author)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Nov. 2004, Vol.12(11), pp.1148-1155 [Peer Reviewed Journal]

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22
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Simultaneous switching noise in on-chip CMOS power distribution networks

Tang, K ; Friedman, E Tang, K (correspondence author)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Aug. 2002, Vol.10(4), pp.487-493 [Peer Reviewed Journal]

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23
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DTT: direct truncation of the transfer function - an alternative to moment matching for tree structured interconnect

Ismail, Yi ; Friedman, E Ismail, Yi (correspondence author)

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2002, Vol.21(2) [Peer Reviewed Journal]

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24
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Applying analog techniques in digital CMOS buffers to improve speed and noise immunity

Secareanu, R ; Friedman, E Secareanu, R (correspondence author)

Analog Integrated Circuits and Signal Processing, June 2001, Vol.27(3), pp.275-279 [Peer Reviewed Journal]

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25
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Inductive properties of high-performance power distribution grids

Mezhiba, A ; Friedman, E Mezhiba, A (correspondence author)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Dec. 2002, Vol.10(6), pp.762-776 [Peer Reviewed Journal]

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26
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Domino logic with variable threshold voltage keeper

Kursun, V ; Friedman, E Kursun, V (correspondence author)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2003, Vol.11(6) [Peer Reviewed Journal]

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27
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Feedback in silicon compilers

Friedman, E. G

IEEE Circuits and Devices Magazine, May 1985, Vol.1(3), pp.15-20 [Peer Reviewed Journal]

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28
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Clock frequency and latency in synchronous digital systems

Friedman, E ; Mulligan, J Friedman, E (correspondence author)

IEEE Transactions on Signal Processing, Apr. 1991, Vol.39(4), pp.930-934 [Peer Reviewed Journal]

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29
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Design Methodology for Global Resonant H-Tree Clock Distribution Networks

Rosenfeld, J ; Friedman, E Rosenfeld, J (correspondence author)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Feb. 2007, Vol.15(2), pp.135-148 [Peer Reviewed Journal]

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30
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3-D Topologies for Networks-on-Chip

Pavlidis, V ; Friedman, E Pavlidis, V (correspondence author)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2007, Vol.15(10) [Peer Reviewed Journal]

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